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TND303 SPI-Bus: Improving Noise Immunity
Prepared by: Fred Zlotnick ON Semiconductor http://onsemi.com
TECHNICAL NOTE
When it comes to communicating over a serial bus, there are three main methods, SPI, Microwire and I2C. The choice is not always easy to make, and often the designer must use whichever hardware is available on his microcontroller or peripherals. Art Eck1 claims that of the three common interfaces, SPI is easiest to write code for, and is the fastest protocol. Some of the drawbacks to the SPI interface are the use of edge triggering and that the SPI bus is more susceptible to high levels of noise. Often, the noise in the system is not under the direct control of the designer. Eck suggests the use of Schmitt triggers to help with the sensitivity of the system to noise. The problem for many system designers, is that previously, a set of Schmitt devices consisted of 6 triggers in a 14-pin package. Even a package like a the TSSOP-14 occupied a great deal of space. Often just one or two gates placed in the proper spot on a circuit board could correct many potential problems and speed up the system. ON Semiconductor is now offering a dual Schmitt device in an SC-70/SC-88A package that occupies only 4.5 mm2 of board space and costs approximately $0.20 each, in volumes of 10,000 or more. The NL27WZ14DFT2 is a dual Schmitt Inverter, manufactured in 0.6 m CMOS technology that can improve noise immunity of any system. The device can be placed right near the serial device and provide noise immunity by its hysteresis on both data and clock lines. It should be remembered that the `14' in logic series, provides a Schmitt input, but also inverts the signal, so the software needs to take that into account.
MCU SPI Port 27WZ14
(Data Assumed to Be Read From the Peripheral)
SPI Peripheral
Figure 1. NL27WZ14 Replaces Larger Schmitt Trigger
In the event that a DSP or MCU is operating at a voltage level different from the peripheral, the gates offer the additional feature of being OVT (over-voltage-tolerant) and can interface any combination from 1.8 V to 5.0 V with no additional hardware. In Figure 1, the SPI peripheral is assumed MISO (Master In, Slave Out), with the MCU being the master. Data is going from the peripheral to the MCU, while the clock is directed from the MCU to the SPI device.
1- Art Eck, Serial Interface for Embedded Design, Circuit Cellar Online - Jan., 2000
(c) Semiconductor Components Industries, LLC, 2001
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July, 2001 - Rev. 0
Publication Order Number: TND303/D
TND303
Notes
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